Intel Integrates Wireless Support On A Single Chip

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By Antone Gonsalves Intel has designed a chip that can receive and transmit WiMax and multiple Wi-Fi signals.
Intel (NSDQ: INTC) on Monday said it has designed a chip that can receive and transmit WiMax and multiple Wi-Fi signals and has developed other on-die technology to lower power consumption and reduce the size of the processor. Intel researchers outlined the achievements in four research papers presented at the International Solid-State Circuits Conference in San Francisco. The papers reflect some of the technology that may one day find its way in Intel chips for use in future mobile Internet devices.
What Intel says it has accomplished is the building of a die that supports WiMax and Wi-Fi a/g/n. In integrating a transceiver capable of handling multiple frequencies on a single chip, Intel has eliminated the use of a "front-end module," technology that performs the same function today on a separate die, Hossein Alavi, director of communications circuits at Intel labs, told InformationWeek. Eliminating the separate module would ultimately enable the building of a smaller processor with lower power consumption, two important attributes for portable Internet devices.
In addition, Intel researchers have integrated a power amplifier that's almost entirely digital for improving the quality and strength of the signal transmitted and received. A digital amplifier can scale with the processor, so as the latter becomes more powerful, so can the amplifier.
Today's chips use analog amplifiers, which are far more limited in their ability to scale. "Taking advantage of Moore's Law in processors is not possible, if we have anything in analog, and the power amplifier is one of the most difficult [to convert]," Alavi said.
Other achievements described in the papers include a "smart receiver" for Wi-Fi and WiMax signals that can adjust power consumption to the properties of the signal, Alavi said. A strong signal, for example, can be processed using less power than a weak signal.
Intel plans to submit a total of 14 research papers to the ISSCC. One paper will deal with the building of on-chip memory that's denser than the SRAM Intel uses today. Intel researchers have decreased the number of transistors for each bit of storage from six to two. That means the chipmaker can double the amount of storage in the same amount of space on a chip, said Randy Mooney, Intel fellow and director of input/output research.
Increasing the amount of data that can move to a chip leads to a higher performing chip, Mooney said. However, the memory being tested in Intel labs is about half as fast as SRAM used today.
The above technologies are in the prototype stage at best, and there is no timetable for when they could appear in products.
Intel also released at ISSCC some technical details on Silverthorne, code name for the 45-nanometer processor that will power Intel's first-generation low-power platform for mobile devices, code-named Menlow. The platform is scheduled to ship in the first half of the year.
Silverthorne's thermal design power will be from 0.6 of a watt to 2 watts. TDP represents the maximum amount of power necessary for cooling. In addition, the chip can achieve a 2-GHz core frequency at 1 volt, and will support such features as Intel's virtualization technology and hyperthreading.